Annual Report

ITEM 1.    Business

Company Overview

        We design, manufacture, sell and support advanced semiconductor capital equipment and process technologies for the global semiconductor industry and related markets. Our systems are used in a variety of segments of the semiconductor market, including advanced silicon processing for memory logic devices, advanced 3-D packaging, MEMS, LED, compound semiconductors and power integrated circuits, or ICs, for communications. We focus our efforts on designing systems that enable device manufacturers to meet today's challenging technological and manufacturing requirements. We offer both front-end-of-line and back-end-of-line systems and process technologies used for the aforementioned markets addressing critical thin film formation technologies, including atomic layer deposition, or ALD, physical vapor deposition, or PVD, chemical vapor deposition, or CVD and plasma etch, or Etch, and thermal processing systems.

        Our customer base is geographically diverse and includes both integrated device manufacturers and foundry-based manufacturers. We have a broad installed base, with approximately 2,500 systems in active operation for which we are providing ongoing parts and service worldwide. We believe that these systems are installed at many of the world's semiconductor manufacturers, including a majority of the top 25 semiconductor manufacturers around the world. We sell our systems globally primarily through a direct sales force and in some instances through local independent sales representatives. Our global sales and support organization is focused on developing and nurturing long-term customer

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relationships. Our largest customers by net sales for our fiscal year ended September 26, 2008 were Win Semiconductor, Inc., Qimonda AG, Triquint Semiconductor Corporation, ST Microelectronics and Infineon Technologies AG.

Industry Overview

        Modern electronic devices are the fundamental building blocks used in all electronic systems, playing an important role in the proliferation of computing, communications and consumer electronics products. The market for semiconductor and related devices has expanded rapidly over recent decades as device manufacturers have produced ICs and other devices, such as 3D-ICs, gaining rapid adoption with increased functionality and increasingly smaller sizes at lower costs.

        VLSI Research Incorporated (VLSI), reports that worldwide semiconductor sales are expected to reach $237.4 billion in 2009 and expects sales to reach $356.5 billion in 2013. Growth in the IC industry has been driven both by the development of new electronic products as well as an increase in the silicon content of applications for the automotive, consumer, communication and computing industries. As these electronic products have become more sophisticated, memory ICs in particular have experienced rapid growth as the need to support increased memory capacity in these products has increased. Memory ICs are available in many different types, including dynamic random access memory, or DRAM, and flash memory, to serve a variety of different memory requirements. According to VLSI, both DRAM and flash memory sales are projected to grow at a compound annual growth rate of more than 11.9% from 2009 through 2013. 3D-IC wafers using TSV technology have numerous applications, including NAND Flash Memory, image sensors, sensors and DSP, DRAM, SRAM, FPGA and memory, processors, amplifiers for wireless LAN, communication for mobile phones and military applications. Market research firm Yole Développement forecasts the compounded annual growth rate for 3D-IC wafers to be above 60% by 2012.

        The design and manufacture of semiconductor devices involve a complex and capital-intensive multi-step process. This process involves different types of capital equipment used to manufacture, assemble and test these devices. For example, to build an IC, transistors are first created on a wafer, such as silicon, by performing a series of steps involving deposition, patterning and selective removal of unwanted layers. Interwoven within these steps are multiple thermal treatments to stabilize or activate various layers. These early fabrication process steps are typically called front-end-of-line processing. Following front-end-of-line processing, the transistors are microscopically wired together through the formation of interconnected metal layers and insulating dielectric materials, known as back-end-of-line processing. Each process step, which may be performed multiple times, is subject to a tightly controlled series of chemical, deposition, thermal and lithographic processes in order to yield a fully functional IC and related devices such as MEMS.

Industry Challenges

        Semiconductor designers and manufacturers are under increasing pressure to bring high-quality and increasingly complex devices to market faster and at lower cost. They must also continue to improve device performance while controlling or minimizing capital expenditures. This becomes more critical as cost-effective scaling presents significant challenges. As a result, device companies are beginning to rely heavily on non-scaling techniques such as new film materials and new device structures to deliver improved device performance. Capital equipment plays an important role in enabling device designers and manufacturers to lower their overall costs, get products to market quickly and improve the products' quality and reliability. As a direct result of the increasing pressure placed on designers and manufacturers to keep pace with Moore's Law, which predicts that for minimum component cost the number of transistors on an IC doubles every 24 months, capital equipment suppliers are facing new challenges in meeting their needs.

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        The key challenges that capital equipment manufacturers like Aviza must address include:

         Integrated Through Silicon Via, or TSV, Technologies vs. Advanced Packaging —The rapid adoption of advanced packaging techniques, which are commonly referred to as wafer level packaging, package-on-package, package-in-package or 3-D packaging, is fueled by the drive for continuous improvement in device performance and functionality in wireless, personal and consumer electronics such as mobile phones, MP3 players and radio frequency identification tags. In addition to the increasing demand for improved performance, IC designers and manufacturers have to deliver improved performance in a smaller overall package and with lower cost. The inherent physical constraints of traditional wire-bonding interconnect schemes create a practical limit on the ability to improve performance while simultaneously reducing size.

        The semiconductor industry continues to strive to meet the demands for improved performance, in a smaller overall package, at lower cost. Traditionally, this demand has been fueled by the industry's desire to keep pace with Moore's Law, coupled with stacking dies one on top of the other and using traditional wire bonding techniques to accomplish the die-to-die and die-to-substrate connect. However, there are physical and performance (primarily resistance capacitance constant) limitations to being able to stack dies and still meet the input/output, or I/O, requirements with wire bonding techniques.

        To achieve higher I/O and lower cost performance, the industry is investing in alternative means of stacking dies and creating interconnect approaches that minimize or eliminate traditional wire bonding techniques, one of which is the use of TSV interconnect structures. According to TechSearch International, Inc., there are over 40 companies with TSV activities. This advancement of TSV activities is a means of keeping pace with Moore's Law. Research and development and pilot line programs are common in the integrated device manufacturing, foundry and packaging manufacturers. We believe that Aviza is one of a few semiconductor capital equipment suppliers that have all of the requisite technologies in our product portfolio to create TSVs.

         New Materials —In order to keep pace with the International Technology Roadmap for Semiconductors (ITRS), the semiconductor industry is faced with the need to develop and adopt an unprecedented number of new materials, as the physical properties of conventional materials are reaching limitations in their ability to provide improved performance. New materials such as high dielectric constant materials, or high-k dielectrics, and metal electrodes are required to increase device performance.

         Lower Cost of Ownership —In order to improve their cost structure, device manufacturers demand processing platforms with lower total cost of ownership, which takes into account not only the initial purchase price but also throughput, yield, reliability, flexibility and other operating costs.

         Time-to-Market —Today's devices are characterized by rapid technological improvements and shorter product life cycles. These product life cycles are accelerated for devices used in consumer electronics products such as mobile phones and digital cameras, given the constant innovation in the consumer electronics industry, which poses additional challenges for semiconductor manufacturers and capital equipment suppliers.

Our Solutions

        We deliver a broad range of semiconductor capital equipment and process technologies to serve the needs of a wide range of integrated device manufacturers (IDMs) and packaging manufacturers. In addition to providing the high product performance expected by our customers, we believe maintaining

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the quality standards of our organization and our worldwide service and support are important to meeting these needs. We believe our customers choose our products because of the following factors:

         Advanced Film Development and Process Technology —Our continued development of process technologies, such as our ALD systems and TSV technology, enables semiconductor manufacturers to use new materials necessary to manufacture and package next-generation devices.

         Worldwide Customer Service and Support —Our goal is to provide our customers with global technical service, in-depth process engineering support and rapid delivery of our systems and parts. We provide customer support through our global service organization 24 hours per day, 7 days per week. In addition, we have multiple parts depots around the world to support our installed base of systems.

         Focus on Customer Relationships and Strategic Alliance —We believe that our regular dialogue with our customers and our visibility into their technology roadmaps allow us to serve their needs effectively. We also work to develop strategic alliances with equipment and materials suppliers to the semiconductor industry to produce next-generation films and processes to keep pace with the International Technology Roadmap for Semiconductors.

         Low Cost of Ownership —Our systems are designed to improve the yield, throughput and utilization of semiconductor manufacturing facilities. Our systems offer integrated process technology, extendibility and optimized process flow to help IC makers achieve their overall cost-of-ownership and functionality objectives.

Our Strategy

        Our objective is to be a leading provider of advanced capital equipment and process technologies to semiconductor manufacturers in our served markets. To achieve this objective, our strategy is comprised of the following elements:

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Provide our customers with a broad range of technologies such as our ALD, CVD, Etch and PVD systems in our served markets and in applications where we believe our products deliver a technical advantage;



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Expand our customer base in the Micro-Electro-Mechanical systems (MEMS), LED, compound semiconductor (III-V) and Power IC markets with Etch, CVD and PVD systems. Continue our penetration in the 3D interconnect arena (employing Through Silicon Via, or TSV, technology) using our integrated solution for research and development;



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Expand our customer base in the memory and logic markets with our ALD systems;



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Further penetrate our existing customer base by seeking opportunities to sell our customers systems from our expanding portfolio of systems that they are not already purchasing from us; and



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Continue to provide service, upgrades, spare parts and ongoing support for the large global installed base of large batch thermal systems, while retaining the capability to manufacture those systems when customers require additional systems.

Systems, Markets and Applications

Deposition

        Deposition involves the application of thin films in advanced device manufacturing. Chemical reactions form deposited films between gaseous reactants at an elevated temperature in the vicinity and on the surface of a wafer. Deposited films can be either crystalline or non-crystalline and can be either insulators or metals. Variations of deposition processes include ALD, PVD, CVD, plasma-enhanced

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chemical vapor deposition, or PECVD, atmospheric pressure chemical vapor deposition, or APCVD, and low pressure chemical vapor deposition, or LPCVD.

         Atomic Layer Deposition —The reduction in the size of devices continues to keep pace with Moore's Law, driving stringent requirements for the thickness control and repeatability of deposited films used in the manufacturing of devices. With decreasing geometries and increasing aspect ratios, we believe that ALD will replace some of the incumbent deposition techniques due to ALD's ability to achieve uniform thickness, which is commonly referred to as conformal step coverage, across the horizontal and vertical planes of the device structure. This method allows the deposition of a wide variety of dielectric and conductive films one atomic layer at a time for various sub-90 nanometer (nm) memory and logic applications.

        Both conventional PVD and CVD systems have limitations with respect to creating films with less thickness at the bottom of trench structures as compared to flat structures. ALD overcomes these limitations by depositing a single atomic layer at a time which covers the entire surface of the wafer independent of the surface features with the intent of achieving nearly 100% conformal step coverage in the most challenging memory structures with aspect ratios greater than 60 to 1.

        The uniformity requirements for sub-100nm technologies pose a serious challenge to current deposition techniques. For example, the uniformity requirements for a 1nm film are plus or minus one-half of an angstrom, which is a unit of measure equal to one ten-billionth of a meter, across a 300mm wafer. We believe that ALD has the process capability to achieve this level of precise control with the repeatability required for high-volume manufacturing.

        We believe that ALD is also best suited to deposit high-k materials, which can meet the lower electrical leakage uniformity, conformal step coverage and material purity requirements for nanotechnology. The deposition temperatures for ALD are hundreds of degrees lower than conventional CVD processes. We offer a single-wafer ALD system to address a variety of applications, film thickness and productivity requirements.

        Our Celsior f xP™ ALD system is a single-wafer, multi chamber cluster solution configurable to both 200mm and 300mm wafer sizes and is designed to meet current process and productivity requirements with capabilities beyond the 90nm node. Our Celsior f xP system is designed to offer precise atomic-level thickness control, low process temperature and highly conformal coatings with film quality for a wide range of films, including aluminum oxide, hafnium oxide, titanium oxide, hafnium silicate, titanium nitride, tantalum nitride and zirconium oxide.

         Physical Vapor Deposition —PVD is a process used to apply conducting, liner and barrier metal layers on an IC. One of the primary PVD methods is sputtering, a process in which an electric discharge creates ions of an inert gas, such as argon, which are then accelerated in a vacuum at a target typically composed of pure metal or a metal compound, such as aluminum, tantalum or copper. The target atoms are sputtered away and deposited on the wafer to form a thin film. Thin conductive films, when patterned by lithography and etching, are used to wire an IC.

        Our Sigma f xP™ system is used to sputter uniform layers of pure metals or metal alloys and metal compounds such as oxides or nitrides. Sigma f xP couples unique process modules on a cluster tool architecture and is designed to achieve lower cost of ownership. Sigma f xP is designed to be one of the cleanest PVD systems on the market, which is a key technology requirement for sputtering high quality films on the wafer. The process chambers are designed around a simple base configuration that can be modified via application-specific kits to address a wide range of device needs. In particular, the process modules are scalable to create advanced capability PVD chambers for depositing high quality barrier and liner layers for advanced metallization structures. These consist of the "long throw" Hi-Fill and "ionized metal" Advanced Hi-Fill PVD chambers for improved barrier and liner deposition into high aspect ratio structures. Where conformal step coverage over high aspect ratio features is critical, a

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metal organic CVD module is available to provide low temperature, largely conformal titanium nitride films. Pre-heat and sputter etch chambers are also available.

        Our Sigma f xP system supports both interconnect applications on the front side of the wafer and solder metal applications on the back side of the wafer for the growing power device market. Our Sigma f xP system also addresses aluminum nitride deposition for bulk acoustic wave, or BAW, devices for next-generation communication products. BAW devices require uniform deposition of piezoelectric films. We have developed significant intellectual property in this area.

         Chemical Vapor Deposition —CVD is a process that can be used to apply thin films of dielectric and, to a lesser extent, conductive materials. During the CVD process, gases that contain atoms of the material to be deposited chemically react to form a thin film of solid material on the wafer. Typical uses for dielectric deposition by CVD include:

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Shallow trench isolation, or STI, to isolate one transistor from another;



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The pre-metal dielectric, or PMD, the insulating layer between the active components and the first interconnect metal layer;



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The inter-metal dielectric, or IMD, the insulating layer between the different metal layers; and



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The final passivation layer that seals the completed device from atmospheric moisture.

        Our Delta f xP™ system can be configured with up to six process modules to address different applications and markets, offering enhanced throughput, uptime and productivity. Process modules are based upon a standard design that allows migration between platforms as capacity demand increases. Key applications for the Delta f xP include STI, PMD and IMD.

        Silicon dioxide, when deposited by conventional techniques, displays small gaps inside the structure, which prevents effective film planarization. Our planar processes (previously referred to as Flowfill and low-k Flowfill processes), which are performed on the Delta f xP, are CVD technologies that were developed to form high-quality silicon dioxide layers that possess the properties both to fill gaps and produce a high degree of planarization. Planar processes reduce the need for chemical mechanical planarization processing with a corresponding reduction in cost of ownership, or in some cases completely remove the chemical mechanical planarization steps.

         Plasma-Enhanced Chemical Vapor Deposition —PECVD is a form of deposition that utilizes plasma to enhance the chemical reaction rates of precursors, or the chemical ingredients that react with other ingredients to produce a thin film. PECVD processing allows deposition at lower temperatures, which is often required for the proper application of certain films. This deposition technique was developed to allow for low temperature processing of silicon nitride films for passivation and insulation of devices.

        Our Delta i2L cluster system is capable of processing wafers up to 200mm in size and produces high-quality dielectric films for use in compound semiconductor, silicon analog and mixed-signal devices. A low temperature deposition process offers high-quality silicon nitride films for use as on-chip capacitor dielectrics. The dense nitride films have low hydrogen content and exhibit improved electrical performance when used in capacitors on an IC, allowing device manufacturers to use thinner capacitor dielectrics, while maintaining reliability. In addition to the capacitor dielectric process, the system also comes equipped with a suite of standard nitride and oxide process recipes.

         Atmospheric Pressure Chemical Vapor Deposition —APCVD is the process by which chemicals are applied to the wafer in an atmospherically controlled environment. Our APCVD systems employ our proprietary approach designed to allow high deposition rates with a simpler reactor design yielding higher operational reliability and high wafer throughput.

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        Our APCVD systems include:

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1500 APCVD —Our 1500 APCVD system processes 200mm wafers addressing design-rule fabrication capability of 0.15 micron. It offers relatively low cost of ownership with a process designed to result in improved reliability, performance and serviceability through enhanced film uniformity, reduced consumables, improved system availability and ultra-low film metal levels. Our 1500 APCVD system provides both doped and un-doped deposition of tetraethylorthosilicate-, or TEOS-, based silicon dioxide and can be utilized in a broad range of dielectric film applications for both logic and memory manufacturing requirements;



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1000 APCVD —Our 1000 APCVD system offers either hybrid or TEOS-reactant processes and is designed for high productivity on 200mm wafer processing lines. It provides both doped and un-doped deposition of TEOS-based silicon dioxide and can be used in a broad range of dielectric film applications for a variety of semiconductor applications; and



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999R APCVD and TEOS999 APCVD —Our 999R APCVD and TEOS999 APCVD systems are for production lines employing between 100mm and 150mm wafers and are capable of simultaneously processing two wafers in parallel. Both systems offer doped and un-doped silicon dioxide processing capabilities.

Etch

        Etch is a process that preferentially removes material from the wafer surface by chemically converting exposed portions of the surface into a gaseous by-product that is pumped away from the process chamber. Almost all deposition processes create a film covering the entire wafer surface. While many layers of different material are required to build up a device, the materials are only needed in selected parts of the wafer during the IC manufacturing process. For example, to create the current carrying "wires" of an IC, the entire wafer surface is covered with sputtered aluminum alloys and its associated barrier layers. These conductive layers are then coated with light-sensitive films, which are commonly referred to as photoresist, and are exposed to the wiring pattern during the photolithography process. Plasma etching is then used to remove the exposed conductive layer, thus replicating the wiring pattern. The metal remains in place under the photoresist, which is then stripped off. The finished metal lines at that point in the device manufacturing process are referred to as the interconnects.

        Our Etch systems include:

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Omega fxP™ —The Omega f xP offers up to six process modules plus in-line stations to allow for the alignment and the cooling down of the wafer. The cluster module also has two vacuum cassette stations and multiple chambers, which provide high throughput for the high volume user or the option to "mix and match" different plasma sources for advanced sequential etching processes.



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Omega i2L —The Omega i2L features our plasma source technologies in a single-chamber format that combines high performance etching with small footprint and low initial capital cost for low-rate production fabrication facilities. These attributes make the Omega i2L particularly well suited for cost-sensitive manufacturing of ICs and compound semiconductors.

        Both the Omega f xP and the Omega i2L support our three main plasma sources: our M0RI™ etch technology, Plasma Enhanced Reactive Ion Etch, or PERIE, and Inductively Coupled Plasma, or ICP. Additional modules may also be added to the main transport modules that provide secondary functions such as post-etch corrosion removal processes. In our etch systems suite, M0RI offers the highest plasma density that provides process solutions for the most advanced polysilicon, oxide and low-k etch requirements. The low plasma density ICP is used extensively for high-density aluminum and polysilicon etching as well as for a broad range of processing on the front and back sides of compound semiconductors. The PERIE offers medium plasma density for silicon and dielectric etching where the

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feature sizes are less challenging. We have also developed a variant of our M0RI etch process chamber specifically for very high aspect ratio silicon etching and micro machining. This deep silicon, or DSi, chamber offers benefits to production users in system-in-package, wafer level packaging and conventional micro-electro-mechanical systems applications. DSi techniques are used in a myriad of applications such as the manufacture of discrete components in system-in-package and accelerometers for car air bags. We also offer a gas phase etch module, which removes sacrificial layers to create microscopic moveable structures.

Batch Thermal Processing

        Wafers are subjected to intense heat that can take a wafer from room temperature to temperatures ranging from 100°C to 1200°C. Thermal processing systems, commonly referred to as furnaces, work with either low pressure, for deposition, or atmospheric, for oxidation and diffusion, conditions. LPCVD is used to deposit either a conductive non-metal film such as doped polysilicon or an insulator film such as silicon nitride. Wafers are loaded into thermal processing systems in batches of 50 to 150 wafers. The heating process may be used to modify the properties of deposited films, reactively grow various films, such as oxide, or modify the conductive properties of a silicon wafer.

        Our thermal processing systems include:

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RVP-300plus ™—Our RVP-300 plus is designed for processing 300mm wafers addressing requirements for 0.13-micron and smaller geometries. The design of the RVP-300 plus focuses on maximizing productivity and throughput. Among its features, the RVP-300 plus is capable of rapidly ramping the temperature up and down, which results in chemical deposition and temperature control across the wafer. The RVP-300 plus also utilizes a dual-cassette configuration resulting in increased throughput;



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RVP-550 ™—Our RVP-550 is a flexible batch heating system with Across-Flow technology and is designed to process loads up to 100 wafers. Our Across-Flow technology generates a virtual single-wafer environment intended to result in improved process performance. We believe that the RVP-550 is well suited for advanced technology applications in a high product mix manufacturing process typically found at an advanced foundry customer;



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RVP-200 —Our RVP-200, which is based on the AVP platform discussed below, processes both eight-inch and six-inch wafers and meets 0.18-micron technology requirements. The RVP-200 features a design that enables it to ramp up and ramp down temperatures between two to ten times faster than the AVP platform and offers faster throughput and tighter junction depth control. By utilizing the AVP platform features such as 16-cassette wafer handling and advanced temperature control, the RVP-200 is designed to offer the same advanced reliability as our AVP systems; and



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AVP-200 —Our AVP-200 is a vertical furnace designed to meet the eight-inch and six-inch wafer requirements of sub-0.25 micron processing. The AVP-200 single-tube system includes advanced process control, data acquisition software, advanced automation, a proprietary process chamber design and an option for atmospheric control within the wafer handling area. Key features of the AVP system include storage capacity for sixteen 25-wafer cassettes, or a total of 400 wafers, and advanced temperature control for accurate wafer temperature regulation. We designed the AVP system to offer customers a low cost of ownership through high productivity and a small footprint.

Integrated Through Silicon Via (TSV) Formation

        The continuing trend in the consumer electronics industry is to develop smaller, more portable devices that allow multiple functions. Many handheld devices are now capable of various functions,

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including voice communication, Internet access, email, video, MP3 and GPS, among others. The challenge faced by designers of these products is to continue the trend that each new generation of devices be smaller and support additional functions at a higher level of performance than the preceding model. The semiconductor industry plays a critical role in enabling the product evolution process by developing new, innovative ways of increasing functionality in a smaller overall device package, but at the same time maintaining or reducing the overall cost of the completed chip set. 3D-ICs are an important part of this innovation.

        For research and development and pilot production, the ideal embodiment of the integrated TSV process solution is a single toolset capable of all three critical, individual process steps in TSV formation: TSV etch, CVD liner & liner etch and PVD. The unique advantage of such an approach would provide an opportunity for TSV development time to be shortened dramatically.

        With all three process technologies, Etch, PVD and CVD, a single system would have a much smaller footprint, compared to three individual systems, and a single install, minimizing cost and disruption to the clean room, thus reducing the overall time to produce the first wafer. In addition, this type of system would allow research and development users to link separate processes without existing the vacuum environment in order to discover potential performance benefits, and then apply those findings to optimally configure production systems. This would be impossible on traditionally configured single-process systems.

        Since all three processes interact with each other, the user is best served by having one supplier in control of Etch, CVD and PVD. An installation where three separate vendors are involved will inevitably introduce delays with each vendor taking responsibility only for its own process. We believe that the shortest time-to-market will be best achieved by a single vendor taking responsibility for all steps.

        Aviza has developed the Versalis f xP, which we believe is the first system to integrate the required TSV processes onto a single platform.

        Our Integrated TSV System:

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Versalis f xP™—The Versalis f xP is a production-proven single-wafer platform. Its individual modules such as deep silicon etch, PVD and CVD have been proven in high-volume manufacturing for various applications, including wafer-level packaging, MEMS and power semiconductors. The Versalis f xP is a single-wafer 200/300 mm cluster system that integrates multiple processes (including Etch, PVD and CVD) on one platform. Targeted for advanced research and development activities for 3D-IC devices, Versalis f xP offers a route for customers to develop their TSV technology and easily migrate their processes to high-volume production. This "one-stop shop" solution enables customers to save money by investing in less capital equipment for research and development, minimize installation costs and make efficient use of manufacturing floor space.

Sales, Marketing and Customer Support

        We sell, install and service our systems for our global device manufacturing customers with the aim of providing viable manufacturing solutions for their existing technological needs, as well as establishing long-term business relationships to support their next-generation products. Our experienced sales personnel have the knowledge to address the technical benefits and economic advantages of our systems. Our sales organization is tightly integrated with our service and support organization, which we believe allows us to understand our customers' needs better and to tailor solutions to meet those needs.

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        Our sales are distributed among three geographic regions that include North America, Europe and Asia Pacific. The following table illustrates the geographic distribution of our net sales for the fiscal years ended September 26, 2008 and September 28, 2007:

        In North America, our systems are marketed and sold through our direct sales and service organization in Scotts Valley, California. In Europe, our systems are marketed and sold primarily through our direct sales and service operations in France, Germany, Israel and the United Kingdom, as well as Italy, where we use a local sales representative. In the Asia Pacific region, we use direct sales and service and agency arrangements. We have offices within the Asia Pacific region in China, Japan, Korea, Malaysia, Singapore and Taiwan.

        In order to demonstrate the capability of our systems, we engage customers during the research and development cycle. We have occasionally provided our newest generation systems to our customers for evaluation. The average duration of an evaluation period for systems provided to our customers is typically less than one year. As we expand our sales efforts globally, particularly with new systems and in emerging markets, we believe that ongoing and continued investment in demonstration and evaluation systems will be important to our future business.

        We believe that a comprehensive global support program is critical to providing sustained value to our customers and maintaining customer loyalty. As a result, we maintain an experienced central customer support group in addition to regional based service and support staff around the world at local centers, who are in close proximity to customers and provide comprehensive local support programs intended to ensure that our systems are operating in optimal fashion.

Customers

        Our customer base is diverse, both geographically and in terms of the types of devices that our customers produce. Customers for our systems include several of the world's top semiconductor manufacturers and foundry makers. We have a broad installed base, with approximately 2,500 systems in active operation for which we are providing ongoing parts and services worldwide.

        Our customers are primarily IC manufacturers. The IC industry is cyclical and has experienced significant fluctuations, and our sales are impacted by broad industry trends. Moreover, we have a highly concentrated customer base. For our fiscal year ended September 26, 2008, one customer, Win Semiconductor Corp., accounted for 16% of our net sales and approximately 57% of our net sales in fiscal 2008 were attributable to our top ten customers. For our fiscal year ended September 28, 2007, two customers, Inotera Memories Inc. and Nan Ya Technology Corp., accounted for 29% and 12% of our net sales, respectively, and approximately 67% of our net sales in fiscal 2007 were attributable to our top ten customers. Our largest customers may vary from year to year depending upon, among other things, our customers' annual budget for capital expenditures, plans for new fabrication facilities and expansions and new system introductions by us. We expect to continue to receive a substantial portion of our net sales from a small number of customers for the foreseeable future.

Backlog

        As of September 26, 2008, our backlog was approximately $17.0 million, as compared to approximately $19.9 million as of September 28, 2007. Our backlog consists of both system and spare part purchase orders from our customers that provide for typical delivery within 12 months. Backlog attributable to systems not yet shipped includes only systems for which we have received a purchase order and have assigned a delivery date. Orders are typically subject to cancellation or delay by the

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customer with no penalty. Because of possible changes in delivery schedules and cancellations of orders, our backlog at any particular point in time is not necessarily representative of actual sales for any succeeding periods, nor is backlog any assurance that we will realize profit from completing these orders.

Research, Development and Engineering

        Modern electronic devices are subject to significant and rapid changes in technologies in order to remain competitive. We and other semiconductor equipment suppliers are subject to the demands that these rapid technological changes impose in relation to new system introductions and continual improvements and enhancements to existing systems. As a result, we strive to design and continually improve low-cost systems that have high throughput, flexibility and scalability and are efficient to manufacture and easy to support. Close working relationships between our key customers and our engineering teams enable us to incorporate our customers' feedback and needs into our system development efforts. We intend to continue to make substantial investments in strategic research and development both in personnel utilization and financial terms.

        We focus our research and development activities on developing applications for our ALD, PVD, CVD, Etch and thermal systems. During recent periods, we have devoted significant resources to developing advanced thin films for dielectrics and capacitors. Our research and development expenditures during fiscal 2008 and 2007 were $29.9 million and $31.9 million, respectively.

Manufacturing, Raw Materials and Supplies

        Our principal manufacturing operations consist of assembly, systems integration and testing at our facilities in Scotts Valley, California and Newport, Wales, U.K. We focus our internal manufacturing efforts on those precision mechanical and electro-mechanical assemblies that we believe differentiate our systems from those of our competitors. We outsource the manufacture of many of our non-critical subassemblies to a number of key suppliers. We attempt to maintain close relationships with these suppliers and to develop qualified alternative suppliers in the event that we lose access to existing suppliers in an effort to reduce cost. Effective component procurement is critical to the quality, manufacturing cycle time and cost of our systems.

        In the past year, we have improved our global supply chain and reduced our material costs. These efforts have resulted in gross margin improvements. Continuous improvement in our supply chain is one of our key strategic initiatives. In addition, our single platform architecture utilizes common design elements, components and subsystems. This results in our ability to maintain lower inventory levels and obtain better prices for the higher volumes of parts that we buy.

        Certain components used in our systems are purchased from a single supplier or a limited group of suppliers. Although we believe that all single-source components are currently available in adequate numbers, we cannot assure you that shortages will not develop in the future.

Competition

        Our markets are competitive and characterized by rapidly changing technology. We believe that the primary competitive factors in our markets are:

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system performance and reliability;



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initial sales price;



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total cost of ownership;



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ability to manufacture and deliver systems on a timely basis;

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ability to meet customer specifications; and



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global customer technical service and support.

        We believe that we compete effectively with our competitors with respect to each of these factors. Our ability to remain competitive will depend to a great extent upon our ongoing performance in the areas of system development and customer support. To be successful in the future, we believe that we must respond promptly and effectively to the challenges of technological change and our competitors' innovations by continually enhancing our system offerings.

        Our principal competitors include Applied Materials, Inc., Tokyo Electron LTD, ASM International N.V., Kokusai Semiconductor Equipment Corporation and IPS, Ltd. Some of our competitors have substantially greater financial resources and more extensive engineering, manufacturing, marketing and customer support capabilities than we do. We expect our competitors to continue to improve the performance of their current products and to introduce new products or new technologies. In addition, we anticipate that competitive pressures may cause continued price-based competition.

Intellectual Property

        We rely on a combination of patents, patent applications, copyrights, trademarks, trade secrets, confidentiality provisions and licensing arrangements to establish and protect our proprietary rights. As of September 26, 2008, we held 113 U.S. and 170 foreign patents. Our issued patents and any subsequently issued patents arising from our pending applications will expire between 2008 and 2027.

        We also rely on technical know-how and other unpatented proprietary information relating to the development and manufacturing of our systems. We seek to protect our trade secrets and proprietary information, in part, by requiring our employees to enter into agreements obligating them to maintain confidentiality and to assign to us the rights to inventions that they make while in our employment. We also enter into non-disclosure agreements with our consultants and suppliers to protect confidential information delivered to them.

        There has been significant litigation in the semiconductor equipment industry involving patents and other intellectual property rights. Infringement claims may be asserted against us in the future and, if such claims are made, we may not be able to defend against such claims successfully or, if necessary, obtain licenses on reasonable terms. Any claim that our systems infringe the proprietary rights of others would force us to defend ourselves and possibly our customers against the alleged infringement. These claims and any resulting lawsuit, if successful, could subject us to significant liability for damages and invalidate our proprietary rights. These lawsuits, regardless of their outcome, would likely be time-consuming and expensive to resolve and would divert management's time and attention. Any potential intellectual property litigation could force us to do one or more of the following:

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lose or forfeit proprietary rights;



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stop manufacturing or selling systems that incorporate the challenged intellectual property;



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obtain from the owner of the infringed intellectual property right a license to sell or use the relevant technology, which license may not be available on reasonable terms or at all and may involve significant royalty payments;



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pay damages and attorneys' fees in some circumstances; or



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redesign those systems that use the challenged intellectual property.

        In addition, in the normal course of business, we periodically receive and make inquiries regarding possible patent infringement. In dealing with such inquiries, it may become necessary or useful for us to obtain or grant licenses or other rights. We cannot assure you that such licenses or rights will be

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available to us on commercially reasonable terms or at all. If we are not able to resolve a claim, negotiate a settlement or obtain necessary licenses on commercially reasonable terms or successfully prosecute or defend our position, it could harm our business, financial condition and results of operations.

Employees

        As of September 26, 2008, we had 491 employees, of which 226 were located in Europe, 103 were located in Asia and 162 were located in North America. Of our total employees, 99 were principally dedicated to research and development, 126 were dedicated to sales and general and administrative, 162 were dedicated to customer service, applications and service and support and 104 were dedicated to manufacturing.

        We consider our relationship with our employees to be good. None of our employees are represented by a labor union or covered by a collective bargaining agreement, and we have never experienced a work stoppage, slowdown or strike.

Facilities

        We maintain our headquarters in Scotts Valley, California, where we own a 213,000-square foot facility. We also operate a leased 103,000-square foot manufacturing and engineering facility in Newport, Wales, U.K. We believe that our facilities in the U.S. and U.K. provide sufficient manufacturing capacity for the foreseeable future.

        In addition, we lease a number of smaller properties and field offices located in France, Germany, China, Japan, Korea, Malaysia, Singapore and Taiwan.

Environmental Matters

        We operate semiconductor applications laboratories and manufacturing facilities in Scotts Valley, California and Newport, South Wales, U.K. and are subject to federal, state and local regulations governing the use of hazardous materials.

        Our Scotts Valley property is a federally listed Superfund site. Chlorinated solvent and other contamination was identified at the site in the early 1980s, and by the late 1980s, Watkins Johnson Corporation, or Watkins Johnson (now WJ Communications, Inc.), a predecessor to the Thermal Division of ASML Holdings, N.V., our Predecessor, had installed a groundwater extraction and treatment system. In 1991, Watkins Johnson entered into a consent decree with the United States Environmental Protection Agency providing for remediation of the site. In July 1999, Watkins Johnson signed a remediation agreement with an environmental consulting firm, ARCADIS Geraghty and Miller, or ARCADIS. Pursuant to this remediation agreement, Watkins Johnson paid approximately $3.0 million in exchange for which ARCADIS agreed to perform the work necessary to assure satisfactory completion of Watkins Johnson's obligation under the consent decree. The agreement also includes a cost overrun guaranty from ARCADIS up to a total project cost of $15.0 million. In addition, the agreement included procurement of a 10-year, claims-made insurance policy to cover overruns of up to $10.0 million from American International Specialty, or AIS, along with a 10-year, claims-made $10.0 million policy to cover unknown pollution conditions at the site.

        Failure of Watkins Johnson, ARCADIS or AIS to fulfill their obligations may subject us to substantial fines, and we could be forced to suspend production, alter manufacturing processes or cease business operations, any of which could harm our business, financial condition or results of operations. We believe that the likelihood of the failure of Watkins Johnson, ARCADIS or AIS to fulfill their respective obligations is remote and that any remaining or uninsured environmental liabilities will not have a material effect on our business, financial condition or results of operations.

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Available Information

        We make available free of charge, through our website, www.aviza.com , our Annual Reports on Form 10-K, Quarterly Reports on Form 10-Q, Current Reports on Form 8-K and all amendments to those reports as soon as reasonably practicable after such material is electronically filed with the SEC. Our publicly filed information is also available on the SEC's website, http://www.sec.gov . The information on our website is not incorporated herein by reference.